Silicon carbide (SiC) includes high-temperature SiC (α-SiC) that has a hexagonal crystal structure and low-temperature SiC (β-sic) that has a cubic crystal structure. Compared with Si, SiC has a higher thermostability, and also has a wider bandgap, which contributes to a high electric breakdown field intensity. Therefore, a semiconductor device formed of a SiC single crystal is expected as a candidate material of a next generation power device to replace a semiconductor device formed of Si. Specifically, the α-SiC is attractive for a semiconductor material of an ultra-low power loss device because the α-SiC has a wider bandgap than the β-SiC.
The α-SiC has a {0001} plane, a {1-100} plane and a {11-20} plane, which are perpendicular to the {0001} plane, as main crystal planes. Hereafter, the {0001} plane is also referred to as a c-plane, and the {1-100} plane and the {11-20} plane are also referred to as a-planes generically.
A c-plane growth method is known as a manufacturing method of the α-SiC single crystal. In the c-plane growth method, a SiC single crystal having a predetermined exposed plane as a growth surface is used as a seed crystal. The predetermined exposed plane may be the c-plane or a plane whose offset angle from the c-plane is within a predetermined range. Then, on the growth surface of the seed crystal, a new SiC single crystal is grown by a method such as a sublimation recrystallization method.
However, the single crystal manufactured by the c-plane growth method has great amount of defects including defects such as micropipe defects (pipe-like void having a diameter of several μm to 100 μm) generated in a direction parallel to a <0001> direction and c-axis threading screw dislocations.
To manufacture a SiC power device having a high performance, a leakage current generated in a SiC semiconductor should be reduced. It is considered that an increase in the leakage current is caused by the micropipe defects and threading screw dislocations generated in the SiC single crystal.
Various conventional methods are disclosed to reduce above-described defects.
For example, JP-A-H05-262599 (corresponding to U.S. Pat. No. 5,958,132, hereafter referred to as patent document No. 1) discloses a growth method of the SiC single crystal. In this growth method (hereafter referred to as an a-plane growth method), a seed crystal, in which a plane (for example, the {1-100} plane or the {11-20} plane) inclined at an angle within approximately 60° to 120° from the c-plane is exposed as a growth surface, is used to grow the SiC single crystal.
Further, the patent document No. 1 discloses:
(1) when SiC is grown on a crystal plane inclined at an angle within approximately 60° to 120° from the c-plane, atom stacking arrangement is shown on the crystal plane, and therefore, a crystal having the same polytype with the seed crystal is easily grown;(2) the threading screw dislocations are not generated by this growth method; and(3) in a case where the seed crystal includes a dislocation having a slip plane on the c-plane, the dislocation will be transferred to the growing crystal.
JP-A-08-143396 (hereafter referred to as patent document No. 2) discloses another growth method of a SiC single crystal. In this growth method, SiC is grown on a seed crystal having a {10-10} plane as the growth surface, and then a {0001} wafer is cut out from the grown single crystal. New SiC is grown using the {0001} wafer as a new seed crystal.
Further, the patent document No. 2 discloses:
(1) a SiC single crystal grown by this method has small amount of micropipe defects; and
(2) a sufficiently large {0001} wafer, which is larger than a wafer obtained from a Acheson crystal, is obtained so that a bulk crystal is easily grown using the {0001} wafer as a seed crystal by this method.
JP-A-2003-119097 and JP-A-2003-321298 (corresponding to US 2003/0070611, hereafter referred to as patent documents No. 3 and No. 4) disclose another growth method of a SiC single crystal. In this growth method, the a-plane growth is performed multiple times in a mutually perpendicular direction, and then the c-plane growth is performed at the end.
Further, the patent document No. 3 discloses:
(1) dislocation density in the growing crystal is reduced exponentially with an increasing number of a-plane growth times;
(2) stacking faults are inevitably generated during the a-plane growth; and
(3) the SiC single crystal grown in this method has no micropipe defects or threading screw dislocations, and has very small amount of stacking faults because of the c-plane growth, which is performed at the end.
JP-A-2004-323348 (corresponding to US 2005/0211156 hereafter referred to as patent document No. 5) discloses another growth method of a SiC single crystal. In this growth method, a dislocation control seed crystal is used to grow SiC. The dislocation control seed crystal has a growth surface, which has an offset angle of within 60° from the {0001} plane, and a region that is capable of generating the threading screw dislocations and is formed on the growth surface.
Further, the patent document No. 5 discloses the threading screw dislocations are generated with certainty in a region formed by c-plane facets during the c-plane growth. Therefore, a generation of heterogeneous polymorphous crystals and different surface orientation crystals is restricted.
The a-plane growth method has an advantage of growing a SiC single crystal having a low density of the threading screw dislocations. However, in the SiC single crystal grown by the a-plane growth method, the stacking faults are easily generated in a direction approximately parallel to the c-plane at a high density. When the stacking faults are generated in the SiC single crystal, an electric resistance in a direction that traverses the stacking faults will increase. Therefore, the SiC single crystal having the stacking faults at a high density may not be used as a semiconductor material for power devices.
It is considered that a SiC single crystal, which has very small amount of threading screw dislocations and stacking faults, may be manufactured by performing the a-plane growth at least one time after performing the c-plane growth.
However, a seed crystal manufactured from a crystal grown by the a-plane growth has very small amount of threading screw dislocations. Therefore, the seed crystal has no step providing source, which transfers polymorphism of the seed crystal to the growing crystal, in a c-lane facet, which is formed on a surface of the growing crystal during the c-plane growth. Accordingly, the heterogeneous polymorphous crystals and the different surface orientation crystals may be generated partially on the c-plane facet. Further, new threading screw dislocations may be randomly generated in the growing crystal with a growth of the heterogeneous polymorphous crystals and the different surface orientation crystals.
Regarding difficulties described above, the patent document No. 5 discloses a growth method in which the dislocation control seed crystal, which has the region capable of generating the threading screw dislocations, is used to grow the SiC single crystal from a beginning of the growth to restrict the generation of the heterogeneous polymorphous crystals and the different surface orientation crystals.
However, it is known by a detailed evaluation that a relatively large amount of the threading screw dislocations may be generated on an interface between the seed crystal and the growing crystal even when the seed crystal has very small amount of threading screw dislocations in the <0001> direction.
In a case where the growth surface has a relatively large offset angle, the generation of the threading screw dislocations is restricted on the interface between the seed crystal and the growing crystal. However, in this case, it is known that the stacking faults (including basal surface threading edge dislocations), which are transferred from the threading screw dislocation generation region in a downstream offset direction, are easily generated. The threading screw dislocation generation region is formed to restrict the generation of the heterogeneous polymorphous crystals. This problem becomes significant with an increasing offset angle. It is also known that when the threading screw dislocation generation region is processed to disarrange the crystal structure, a density of generated stacking faults will increase.
As described above, the threading screw dislocations generated during the growth with a relatively small offset angle, and the stacking faults generated during the growth with a relatively large offset angle are in a trade-off relationship, and a growth of high-performance SiC is inhibited by this trade-off relationship.